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ISL5216
Instruction Bit Fields
INSTRUCTION BIT FIELDS
BIT
POSITIONS
8:0
FUNCTION
Instruction
Instruction Field Bit Mapping
DESCRIPTION
Bit
8
7
6
5
4
3
2
1
0
Type
WAIT
0
0
X
X
X
X
C
C
C
FIR
0
1
Start
IncrRS
DecrSel DecrEn
LdLp
DecrLp
EnU/C
JUMP
1
J
J
J
J
J
C
C
C
(NOPs and loading the loop counter are special cases of the FIR instruction).
XXXX
JJJJJ
CCC
000
001
010
011
= ignored.
= jump destination (sequence step number).
= condition code.
= ! (waitcount ≥ threshold) -- See IWA = *00Ch, bits 9:0 for threshold details.
= waitcount ≥ threshold -- See IWA = *00Ch, bits 9:0 for threshold details.
= loop counter ≠ 0.
= loop counter = 0.
100
= ! (RSCO)
(RSCO - resampler NCO carry output).
101
110
111
Start
IncrRS
= RSCO.
= sync (if enabled) or μ P controlled bit.
= always.
= load parameters and start filter computation, set to zero for no-ops, loop counter loads.
= increment resampler during this filter.
Increments on start or at each FIR output depending on μ Pcontrol bit.
DecrSel = selects between two decrement values for the wait counter.
DecrEn
LdLp
DecrLp
EnU/C
= decrement wait count on starting this instruction.
= load loop counter with the data in the I(20:9) bit field.
The start bit should not be set when this bit is set.
= decrement loop counter on starting this instruction.
= enable U/C counter with this FIR.
This multiplies the data by 1, j, -1, -j.
The multiplication factor changes each time the filter runs.
14:9
17:15
FIR Type
Steps per FIR
19
FIR Parameter Bit Fields
14:9 FIR type.
000000
NOP.
000001
Decimating FIR, Even Symmetric, Even # Taps.
000010
Decimating FIR, Even Symmetric, Odd # Taps.
000011
Decimating FIR, Odd Symmetric, Even # Taps.
000100
Decimating FIR, Odd Symmetric, Odd # Taps.
000101
Decimating FIR, Asymmetric.
001000
Resampling FIR, Asymmetric.
001001
Interpolating HBF.
100000
Decimating FIR, Complex (Asymmetric).
NOTES:
14. Regular interpolation FIRs are successive runs of a FIR with no data address increment, but with
coefficient start address increments.
15. Decimating HBFs are even symmetric, odd number of taps but with different data step sizes.
16. U/C FIR is a normal FIR with the U/C bit enabled.
17. Other codes may be added in the future.
Specifies the number of steps per FIR instruction sequence (load with value minus 1)
(set to 0 for all FIR types except complex which is set to 1).
FN6013.3
July 13, 2007
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